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Standards commonly used in the UK joining industry: Electronics and Semiconductor Devices (Soldered)

   

Standards commonly used in the UK joining industry: Electronics and Semiconductor Devices (Soldered)

Frequently Asked Questions

TWI Frequently asked questions

Electronics and Semiconductor Devices (Soldered)

General

BS 3934
Mechanical standardisation of semiconductor devices

Part 5: 1997 Recommendations applying to tape automated bonding (TAB) of integrated circuits

Identical to IEC 60191-5:1997

Recommendations applying to integrated circuits supplied in packages using tape automated bonding (TAB) as the principal component for structural and interconnection functions are provided. The standard is applicable to the finished component supplied by a manufacturer to a user and does not define requirements relating to the IC to tape interface (the inner lead bond or ILB).

BS EN 60191
Mechanical standardisation of semiconductor devices

Identical to IEC 60191

Part 6: 2009 General rules for the preparation of outline drawings of surface mounted semiconductor device packages

The preparation of outline drawings of surface mounted semiconductor devices is outlined, supplementing Parts 1 and 3 of EN 60191. All surface-mounted device discrete semi-conductors with a lead count of greater or equal to 8, and integrated circuits classified as form E in Clause 3 of EN 60191-4 are included.

Part 6-1: 2001 Mechanical standardisation of semiconductor devices. General rules for the preparation of outline drawings of surface mounted semiconductor device packages. Design guide for gull-wing lead terminals

The requirements for the design rule of terminal shape plastic packages with gull-wing leads; e.g., QFP, SOP, SSOP, TSOP, etc. which are packages classified as Form E in IEC 60191-4 are specified. The publication is intended to establish common rules on terminal shapes irrespective of package types.

Part 6-2: 2002 Mechanical standardisation of semiconductor devices. General rules for the preparation of outline drawings of surface mounted semiconductor device packages. Design guide for 1.50 mm, 1.27 mm and 1.00 mm pitch ball and column terminal packages

The requirements for the preparation of drawings of integrated circuit outlines for the various ball terminal packages, e.g. ceramic ball grid array (C-BGA), plastic ball grid array (P-BGA), tape ball grid array (T-BGA) and others as well as column terminal packages, e.g. ceramic column grid array (C-CGA) are specified.

Part 6-5: 2001 Mechanical standardisation of semiconductor devices. General rules for the preparation of outline drawings of surface mounted semiconductor device packages. Design guide for fine-pitchball grid array (FBGA)

Common outline drawings and dimensions for all types of structures and composed materials of fine-pitch ball grid array (FBGA), with a terminal pitch less than, or equal to, 0,80 mm and a square package body outline are presented.

Part 6-6: 2001 Mechanical standardisation of semiconductor devices. General rules for the preparation of outline drawings of surface mounted semiconductor device packages. Design guide for fine pitch land grid array (FLGA). Proposed amendment on terminology

Common outline drawings and dimensions for all types of structures and composed materials of fine-pitch land grid array (FLGA) with a terminal pitch less than, or equal to, 0,80 mm and a square package body outline is provided.

Part 6-12: 2011 General rules for the preparation of outline drawings of surface mounted semiconductor device packages. Design guidelines for fine-pitch land grid array (FLGA)

Standard outline drawings, dimensions, and recommended variations for all fine-pitch land grid array packages (FLGA) with terminal pitch of 0,8 mm or less are provided.

Part 6-13: 2007 (+ 2013 draft) Mechanical standardisation of semiconductor devices. Design guideline of open-top-type sockets for fine-pitch ball grid array and fine-pitch land grid array (FBGA/FLGA)

A design guideline of open-top-type semiconductor sockets for Fine-pitch Ball Grid Array (FBGA) and Fine-pitch Land Grid Array (FLGA) is presented. The standard is intended to establish the outline drawings and dimensions of the open-top-type socket out of the test and burn-in sockets applied to FBGA and FLGA.

Part 6-17: 2011 Mechanical standardisation of semiconductor devices. General rules for the preparation of outline drawings of surface mounted semiconductor device packages. Design guide for stacked packages. Fine-pitch ball grid array and fine-pitch land grid array (P-PFBGA and P-PFLGA)

Outline drawings and dimensions for stacked packages and individual stackable packages in the form of FBGA or FLGA are provided.

Part 6-18: 2010 General rules for the preparation of outline drawings of surface mounted semiconductor device packages. Design guide for ball grid array (BGA)

Standard outline drawings, dimensions, and recommended variations for all square ball grid array packages (BGA), whose terminal pitch is 1 mm or larger are provided.

Part 6-22: 2013 General rules for the preparation of outline drawings of surface mounted semi-conductor device packages. Design guide for semi-conductor packages. Silicon Fine-pitch Ball Grid Array and Silicon Fine-pitch Land Grid Array (S-FBGA and S-FLGA)

Outline drawings and dimensions common to silicon-based package structures and materials of ball grid array packages (BGA) and land grid array packages (LGA) are provided.

BS EN 61760
Surface mounting technology

Identical to IEC 61760

Part 1: 2006 Standard method for the specification of surface mounting components (SMDs)

A reference set of process conditions and related tests to be used when detailing component requirements for electronic components, intended for use in surface mount technology, are specified.

Part 2: 2007 Transportation and storage conditions of surface mounting devices (SMD) - application guide

Transportation and storage conditions for surface mounting devices (SMDs) to ensure trouble-free processing of the devices (active and passive), are specified. (Conditions for printed boards are not part of the standard.)

Part 3: 2010 Standard method for the specification of components for through hole reflow (THR) soldering

A reference set of requirements, process conditions and related test conditions to be used when compiling specifications of electronic components that are intended for usage in through hole reflow soldering technology are provided, in order to ensure that components with leads intended for through hole reflow and surface mounting components can be subjected to the same placement and mounting processes.

Part 4: 2015 Classification, packaging, labelling and handling of moisture sensitive devices

Methods for classifying moisture sensitive devices into moisture sensitivity levels related to soldering heat, and provisions for packaging, labelling and handling, are specified. The standard extends classification and packaging methods to components where formerly this was not required or deemed appropriate. For these cases additional moisture sensitivity levels and an alternative method for packaging are specified. Devices intended for reflow soldering, such as surface mount devices, and those through-hole devices with specific documented support for reflow soldering, are covered by the standard. Semiconductor devices and devices for flow (wave) soldering are not included.

BS PD IEC/TS 62647
Process management for avionics. Aerospace and defence electronic systems containing lead-free solder

Identical to IEC/TS 62647

Part 1: 2012 Lead-free management

The objectives of, and requirements for, documenting processes that assure customers and regulatory agencies that aerospace and high performance electronic systems containing Pb-free solder, piece parts, and boards will satisfy the applicable requirements for performance, reliability, airworthiness, safety, and certifiability throughout the specified life of performance are defined.

Part 2: 2012 Mitigation of the deleterious effects of tin

Processes for documenting the mitigating steps taken to reduce the harmful effects of tin finishes in electronic systems are established. The PAS applies to aerospace and high performance electronic applications which procure equipment that may contain Pb-free tin finishes.

Part 21: 2013 Programme management. Systems engineering guidelines for managing the transition to lead-free electronics

This part is designed to assist program management and/or systems engineering management in managing the transition to lead-free (Pb-free) electronics to assure product reliability and performance, and should be used in conjunction with Parts 1 and 2.

Part 22: 2013 Technical guidelines

Technical guidance is provided by aerospace system suppliers, e.g. original equipment manufacturers and maintenance facilities, in developing and implementing designs and processes to ensure the continued performance, quality, reliability, safety, airworthiness, configuration control, affordability, maintainability, and supportability of high performance aerospace systems (subsequently referred to as AHP) both during and after the transition to Pb-Free electronics.

ECSS-Q-ST-70-38C: 2008
High-reliability soldering for surface mount and mixed technology

European Cooperation for Space Standardization

This European Space Agency (ESA) standard defines the technical requirements and quality assurance provisions for the manufacture and verification of high reliability electronic circuits based on surface mounted device (SMD) and mixed technology. Acceptance and rejection criteria for high reliability manufacture of surface mount and mixed technology circuit assemblies intended to withstanding normal terrestrial conditions and the vibrational g loads and environment imposed by space flight are defined. It covers materials, design and workmanship; the mounting and supporting of components, terminals and conductors for operating temperatures between -55 and +85 deg.C. Special thermal heat sinks are applied to devices having high thermal dissipation (e.g. junction temperatures of 110 deg.C, power transistors) in order to ensure that solder joints do not exceed 85 deg.C.

 

Consumables

ASTM F72: 2006
Standard specification for gold wire for semiconductor lead bonding
Withdrawn. No replacement
Round drawn/extruded gold wires for internal semiconductor device electrical connections are covered. The wires are available in four classifications, namely: copper-modified wire, beryllium-modified wire, high strength wire, and special purpose wire. Wires shall be examined by test methods suggested, and each class shall conform correspondingly to specified requirements for chemical composition, mechanical properties (breaking load and elongation), dimension (diameter and weight), and workmanship and finish. Wire curl, wire axial twist, and wire roundness tests shall also be undertaken.

ASTM F106-12
Standard specification for brazing filler metals for electron devices

The specification covers requirements for filler metals suitable for brazing internal parts and other critical areas of electron devices in a non-oxidising atmosphere. Material forms are strip, wire, preforms and powders. The prescribed items include chemical composition (Ag and Au based), ordering information, mechanical properties, dimensions, tolerances, finish, tests (for cleanness and spatter) and packaging. A non-mandatory appendix includes a guide to the AWS classification of vacuum grade filler metals, brazing procedure considerations and operating characteristics and usability of several standard fillers

ASTM F487: 2013
Standard specification for fine aluminum-1% silicon wire for semiconductor lead bonding

Aluminium 1 % silicon alloy wire for semiconductor devices lead bonding is defined and is limited to wire of diameter up to and including 0.0020 in. (0.051 mm). The wire surface shall be clean and free of finger oils, lubricant residues, stains, and particulate matter. The elongation and breaking load shall be tested to meet the requirements prescribed. Methods for determining the wire dimensions are detailed; the chemical requirements are determined by spectrographic analysis.

BS EN 61190
Attachment materials for electronic assembly

Identical to IEC 61190

Part 1-1: 2002 Requirements for soldering fluxes for high quality interconnections in electronics assembly

This standard is a flux characterization, quality control and procurement document. It defines the classification of soldering materials, including liquid flux paste, paste flux, solder-paste flux, solder-preform flux and flux cored solder, through specifications of test methods and inspection criteria. It is intended to apply to all types of flux as used for soldering and in particular to soldering in electronics, specifically for high quality interconnections in electronics assembly.

Part 1-2: 2014 Requirements for soldering pastes for high quality interconnections in electronics assembly

The requirements of solder paste are described in general terms through the definitions of properties and specification of test methods and inspection criteria. The standard is applicable to all types of solder paste used for general soldering, and for soldering in electronics assembly, specifically for high quality interconnections in electronics assembly.

Part 1-3: 2007 + A1: 2011 (+ 2015 draft) Requirements for electronic grade solder alloys and fluxed and non-fluxed solid solders for electronic soldering applications

This part of the standard refers to electronic grade solder alloys, fluxed, non-fluxed bar, ribbon, and powder solders other than solder paste. The requirements and test methods are prescribed for electronic soldering applications as well as special electronic grade solders.

IPC J-STD-004B: 2008 + A1: 2011
Requirements for soldering fluxes

This standard prescribes general requirements for the classification and characterization of fluxes for high quality solder interconnections.

IPC J-STD-005A: 2012
Requirements for soldering pastes

General requirements for the characterization and testing of solder pastes used to make high quality electronic interconnections are prescribed.

IPC J-STD-006C: 2013
Requirements for electronic grade solder alloys and fluxed and non-fluxed solid solders for electronic soldering applications

The nomenclature, requirements and test methods for electronic grade solder alloys, for fluxed and non-fluxed bar, ribbon, and powder solders, for electronic soldering applications, and for special electronic grade solders are described.

Joining and Personnel

BS EN 61191
Printed board assemblies

Identical to IEC 61191

Part 1: 2013 (+ 2015 draft) Generic specification. Requirements for soldered electrical and electronic assemblies using surface mount and related assembly technologies

Requirements for materials, methods and verification criteria for producing quality soldered interconnections and assemblies using surface mounted and related assembly technologies are prescribed. Also included are recommendations for good manufacturing processes.

Part 2: 2013 (+ 2015 draft) Sectional specification. Requirements for surface mount soldered assemblies

Requirements for surface mounted solder connections are prescribed. The requirements pertain to those assemblies that are totally surface mounted or to the surface mounted portions of those assemblies that include other related technologies (e.g. through-hole, chip mounting, terminal mounting, etc.).

Part 3: 1999 (+ 2015 draft) Sectional specification. Requirements for through-hole mount soldered assemblies

Requirements for lead and hole solder assembly are prescribed. The requirements pertain to those assemblies that are totally lead and hole, through-hole mounting technology (THT), or the THT portions of those assemblies that include other related technologies (i.e. surface mount, chip mounting, terminal mounting).

Part 4: 1999 (+ 2015 draft) Sectional specification. Requirements for terminal soldered assemblies

Requirements for terminal soldered assemblies are prescribed. The requirements pertain to those assemblies that are totally terminal/wire interconnecting structures or to the terminal/wire portions of those assemblies that include other related technologies (i.e. surface mounting, through-hole mounting, chip mounting).

BS EN 61192
Workmanship requirements for soldered electric assemblies

Identical to IEC 61192

Part 1: 2003 General

General requirements for the manufacture, handling and workmanship of soldered electronic assemblies on printed boards and similar laminates attached to the surface(s) of organic substrates are specified. It covers requirements for applying the standard, pre-process activities, component preparation, mounting structure and printed board preparation, surface-mount solder paste deposition, non-conductive adhesive deposition and curing, surface-mounted component placement, through-hole component insertion, placement of terminals and press-fit pins, reflow soldering, immersion soldering, individual point soldering, cleaning, electrical testing, rework and repair, conformal coatings, packaging, shipping and training.

Part 2: 2003 Surface mount assemblies

This British Standard specifies general requirements for the manufacture, handling and workmanship of soldered, surface-mounted electronic assemblies and multichip modules on organic substrates, printed boards and similar laminates attached to the surface(s) of inorganic substrates. It covers requirements for applying the standard, component preparation, solder paste deposition, non-conductive adhesive deposition, temporary masking, component placement, post placement rework, adhesive curing, soldering, cleaning, hand placement and soldering and electrical testing.

Part 3: 2003 Through hole mount assemblies

General requirements for workmanship in through-hole mount soldered assemblies on organic substrates, on printed boards, and on similar laminates attached to the surface(s) of inorganic substrates are given. It applies to assemblies that are totally through-hole or mixed assemblies including surface mounting or other related assembly technologies, e.g. terminals, wires.

Part 4: 2003 Terminal assemblies

General requirements for workmanship in terminal soldered assemblies on organic substrates, on printed boards, and on similar laminates attached to the surface(s) of inorganic substrates are given. It applies to assemblies that are totally terminals or mixed assemblies including surface mounting or other related assembly technologies, e.g. through-hole, wires.

Part 5: 2007 Rework, modification and repair of soldered electronic assemblies

Information and requirements applicable to modification, rework and repair procedures for soldered electronic assemblies are presented. Specific processes used to manufacture soldered electronic assemblies where components are attached to printed boards and to the relevant parts of resulting products are covered, as well as activities that can form part of the work in assembling mixed technology products.

BS PD IEC/PAS 61249-8-5: 2014
Qualification and performance specification of permanent solder mask and flexible cover materials

Identical to IPC-SM-840E: 2010

Requirements for - the evaluation of solder mask and cover materials; conformance of solder mask and cover material properties; qualification of the solder mask and cover material via the appropriate test substrate; qualification assessment of the solder mask and cover material in conjunction with the production printed board process - are established.

BS PD IEC/TS 62647
Process management for avionics. Aerospace and defence electronic systems containing lead-free solder

Identical to IEC/TS 62647

Part 23: 2013 Rework and repair guidance to address the implications of lead-free electronics and mixed assemblies

Technical background, procurement guidance, engineering procedures, and guidelines to assist organisations reworking/repairing aerospace and high performance electronic systems, whether they were assembled or previously reworked/repaired using traditional alloys such as SnPb or Pb-free alloys, or a combination of both solders and surface finishes are provided. The PAS contains a review of known impacts and issues, processes for rework/repair, focused to provide the technical structure to allow the repair technician to execute the task.

ECSS-Q-ST-70-08C: 2009
Manual soldering of high-reliability electrical connections

European Cooperation for Space Standardization

This European Space Agency standard defines the technical requirements and quality assurance provisions for the manufacture and verification of manually soldered, high reliability electrical connections. Acceptance and rejection criteria for electrical connections intended to withstand normal terrestrial conditions and the vibrational g-loads and environment imposed by space flight are defined. The document covers tools, correct materials, design and workmanship. Verification of manual soldering assemblies which are not described in this standard are performed by vibration and thermal cycling testing. The requirements for verification are given. The mounting and supporting of components, terminals and conductors for services temperatures of -55 to +85 deg.C are prescribed. For temperatures outside this normal range, special design, verification and qualification testing is performed to ensure the necessary environmental survival capability. Special thermal heat sinks are applied to devices having high thermal dissipation (e.g. junction temperatures of 110deg.C, power transistors) in order to ensure that solder joints do not exceed 85deg.C.

ECSS-Q-ST-70-28C: 2008
Repair and modification of printed circuit board assemblies for space use

European Cooperation for Space Standardization

This European Space Agency standard details the requirements and procedures for repair and modification required to maintain the rigorous standards set by the customer for the manufacture and assembly of space-quality printed circuit boards. It is confined to the repair and modification of single­sided, double­sided and multi­layer printed circuit board assemblies.

IPC-6012D: 2015
Qualification and performance specification for rigid printed boards

The qualification and performance requirements for the fabrication of rigid printed boards are established and defined.

IPC-6012DS : 2015 Space and military avionics applications addendum to IPC-6012D

IPC-7711B/7721B: 2007 (+ Amd: 2007, 2014)
Rework, modification and repair of electronic assemblies

Procedures for repairing and reworking printed board assemblies are provided, and includes expanded coverage for lead free processes, and additional inspection guidelines for operations such as repair that may not have other published criteria.

IPC-CM-770E: 2004
Guidelines for printed board component mounting

The guide discusses general recommended assembly guidelines and also specific packaging types. The parts are described in detail and each section outlines specifics affecting the part class. Descriptions and classifications provided are those generally used in the industry with reference to military and commercial applications.

Quality

BS EN 61191
Printed board assemblies

Identical to IEC 61191

Part 1: 2013 (+ 2015 draft) Generic specification. Requirements for soldered electrical and electronic assemblies using surface mount and related assembly technologies

Requirements for materials, methods and verification criteria for producing quality soldered interconnections and assemblies using surface mounted and related assembly technologies are specified. Recommendations for good manufacturing processes are included.

BS EN 61193
Quality assessment systems

Identical to IEC 61193

Part 1: 2002 Registration and analysis of defects on printed board assemblies

Methods of registration and analysis of defects on soldered printed board assemblies are defined. The latter allow effective comparison of performance between products, processes and production locations and serve as a basis for general quality improvement. Defect data collection in two categories are specified. Category 1 ppm: providing data for registration purposes to enable overall performance comparison of assembly operations, and Category 2 ppm: providing data for individual sub-process assessment, analysis and control purposes.

Part 2: 2007 Selection and use of sampling plans for inspection of electronic components and packages

The inspection of electronic components, packages and modules for use in electronic and electric equipment is covered. Sampling plans are specified for inspection by attributes on the assumption that the acceptance number is zero (Ac = 0), including criteria for sample selection and procedures. A method is provided for the calculation of the expected value of the statistical verified quality limit (SVQL) at a confidence level of 60 %. Amongst other things, the method can be used to verify the effectiveness of the supplier’s process control.

Part 3: 2013 Selection and use of sampling plans for printed board and laminate end-product and in-process auditing

Sampling plans for inspection by attributes, including sample plan selection criteria and implementation procedures for printed board and laminate end-product and in-process auditing are established. These principles permit the use of different sampling plans that may be applied to an individual attribute or set of attributes, according to classification of importance with regard to form, fit and function.

IPC-A-600J: 2016
Acceptability of printed boards

The preferred, acceptable, and nonconforming conditions that are either externally or internally observable on printed boards are described and visual interpretation of minimum requirements set forth in various printed board specifications, e.g.; IPC-6010 series, J-STD-003, etc. are given.

IPC-A-610F: 2014 (+ Amd.1:2015)
Acceptability of electronic assemblies

This standard is a collection of visual quality acceptability requirements for electronic assemblies.

IPC J-STD-001F: 2014 +A1: 2015
Requirements for soldered electrical and electronic assemblies

This document is recognised worldwide as the sole industry-consensus standard covering soldering materials and processes. Revision E includes support for lead-free manufacturing, in addition to easier-to-understand criteria for materials, methods and verification for producing quality soldered interconnections and assemblies. The requirements for all three classes of construction are included.

Testing

ASTM F458: 2013
Standard practice for nondestructive pull testing of wire bonds

This practice covers nondestructive testing of individual wire bonds made by either ultrasonic, thermal compression or thermosonic techniques. The test is destructive to unacceptable wire bonds but is designed to avoid damage to acceptable wire bonds. Note: the term "wire bond" includes the entire interconnection: both welds and the intervening wire span. Wire bonds made with small-diameter (from 0.0007 to 0.003-in. (18 to 76 micrometres)) wire of the type used in integrated circuits and hybrid microcircuits are covered.

ASTM F459: 2013
Standard test methods for measuring pull strength of microelectronic wire bonds

Test methods to determine the pull strength of a series of wire bonds are described. Instructions are provided to modify the methods for use as a referee method. The methods can be used for wire bonds made with wire having a diameter of from 0.0007 to 0.003 in. (18 to 76 micrometres). Note: the term "wire bond" includes the entire interconnection: both welds and the intervening wire span.

ASTM F584: 2006e1
Standard practice for visual inspection of semiconductor lead bonding wire
Withdrawn. No replacement
Conditions for nondestructive visual inspection of the surface finish of spooled aluminium and gold wire used for making internal semiconductor device connections and hybrid microelectronic connections are defined.

ASTM F1269: 2013
Test methods for destructive shear testing of ball bonds

Test methods for determination of the shear strength of a series of ball bonds made by either thermal compression or thermosonic techniques are presented. The test methods cover ball bonds made with small diameter (from 18 to 76 microns (0.0007 to 0.003 inches) wire of the type used in integrated circuits and hybrid microelectronic assemblies, and can be used only when the ball height and diameter are large enough and adjacent interfering structures are far enough away to allow suitable placement and clearance (above the bonding pad and between adjacent bonds) of the shear test ram.

ASTM F1995: 2013
Standard test method for determining the shear strength of the bond between a surface mount device (SMD) and substrate in a membrane switch

A test method to determine the shear integrity of materials and procedures used to attach surface mount devices (SMD) to a membrane switch circuit is specified. The test is mainly used to indicate cure requirements for conductive adhesive and/or underfill and should be used prior to encapsulating. It may also be used to demonstrate the Shear Force with encapsulation.

ASTM F3147: 2015
Standard test method for evaluating the reliability of surface mounted device (SMD) joints on a flexible circuit by a rolling mandrel bend

A means of testing a completed surface mounted device (SMD) joint for bond strength and inter-layer stress compatibility is specified. A completed SMD joint includes; SMD (LED, resistor, etc), PTF ink land (typically silver), conductive adhesive (typically silver), staking compound (non-conductive), and encapsulant (non-conductive).

BS EN 60068
Environmental testing

Identical to IEC 60068

Part 2-20: 2008 Test T. Test methods for solderability and resistance to soldering heat of devices with leads

Tests are presented to determine the ability of component terminations and printed circuits to wet easily, and to check that the component itself will not be damaged by assembly soldering processes.

Part 2-54: 2006 Tests. Test Ta. Solderability testing of electronic components by the wetting balance method

This part of IEC 60068 outlines Test Ta, solder bath wetting balance method applicable for any shape of component terminations to determine the solderability. It is especially suitable for reference testing and for components that cannot be quantitatively tested by other methods. (For surface mounting devices (SMD), IEC 60068-2-69 should be applied if it is suitable.) This standard provides the standard procedures for solder alloys containing lead (Pb) and for lead-free solder alloys.

Part 2-58: 2015 Tests. Test Td. Test methods for solderability. Resistance to dissolution of metallisation and to soldering heat of surface mounting devices (SMD)

Applicable to surface mounting devices (SMD), which are intended to mount on substrates. Standard procedures for solder alloys containing lead (Pb) and for lead-free solder alloys are provided along with procedures for determining the solderability and resistance of soldering heat to lead-free solder alloys, and procedures for determining the solderability, dissolution of metallisation and resistance of soldering heat to solder alloys which are eutectic or near eutectic tin lead solders. The procedures in this standard include the solder bath method and reflow method. The objective of this standard is to ensure that component lead or termination solderability meets the applicable solder joint requirements of IEC 61191-2 using each of the soldering methods specified in IEC 61760-1. In addition, test methods are provided to ensure that the component body can resist the heat load to which it is exposed during soldering.

Part 2-69: 2007 (+ 2014 draft) Tests. Test Te. Solderability testing of electronic components for surface mount technology by the wetting balance method

A description is given of two wetting balance methods (solder bath and solder globule) for quantitatively determining the solderability of terminations on surface mounted devices. Both techniques are applicable to components with metallic terminations and metallised solder pads. Topics covered include: general description of the method; description of the test apparatus; specimen preparation; solder and flux composition; test procedures; test conditions; presentation of results; and information to be given in the relevant specification. Equipment specification and use of the wetting balance for surface mounted device (SMD) solderability testing are covered in annexes.

Part 2-83: 2011 Tests. Test Tf: Solderability testing of electronic components for surface mounting devices (SMD) by the wetting balance method using solder paste

Methods for comparative investigation of the wettability of the metallic terminations or metallised terminations of SMDs with solder pastes are provided. Data obtained by these methods are not intended to be used as absolute quantitative data for pass-fail purposes.

BS EN 60512
Connectors for electronic equipment. Tests and measurements

Identical to IEC 60512

Part 12-1: 2006 Soldering tests. Test 12a. Solderability. Wetting, solder bath method

A standard test method to assess the solderability of the terminations of a connector designed for use with printed boards or for other applications using similar soldering techniques is detailed.

Part 12-2: 2006 Soldering tests. Test 12b. Solderability. Wetting, soldering iron method

A standard test method to assess the solderability of the terminations of a connector that are designed to be soldered with a soldering iron and the soldering bath test method of IEC 60512-12-1 is not appropriate is detailed.

Part 12-3: 2006 Soldering tests. Test 12c. Solderability. Dewetting

A standard test method to assess the ability of the terminations of a connector to remain covered with solder when being brought into contact with molten solder under specified conditions is defined.

Part 12-4: 2006 Soldering tests. Test 12d. Solderability. Resistance to soldering heat. Solder bath method

A standard test method is detailed to assess the ability of a connector to withstand the heating stresses produced by a mass soldering operation.

Part 12-5: 2006 Soldering tests. Test 12e. Resistance to soldering heat. Soldering iron method

A standard test method is detailed to assess the ability of a connector to withstand the heating stresses produced by a soldering iron.

Part 12-6: 1997 Soldering tests. Test 12f. Sealing against flux and cleaning solvents in machine soldering

The object of this test is to detail a standard test method to verify the effectiveness of the sealing of a component against flux and cleaning solvents during the machine soldering process. The results of this test may not be represent active for other fluxes; e.g. resin-reduced foam flux, other fluxing and cleaning methods as prescribed herein.

Part 12-7: 2001 Soldering tests. Test 12g. Solderability. Wetting balance method

This specification defines a standard test method to assess the solderability of the terminations of a component designed for use with printed boards or other applications using similar soldering techniques.

BS EN 60749
Semiconductor devices. Mechanical and climatic test methods

Identical to IEC 60749

Part 15: 2010 Resistance to soldering temperature for through-hole mounted devices

A test used to determine whether encapsulated solid state devices used for through-hole mounting can withstand the effects of the temperature to which they are subjected during soldering of their leads by using wave soldering or a soldering iron is described.

Part 20: 2009 Resistance of plastic encapsulated SMDs to the combined effect of moisture and soldering heat

A means of assessing the resistance to soldering heat of semiconductors packaged as plastic encapsulated surface mount devices (SMDs) is provided. This test is destructive

Part 20-1: 2009 Handling, packing, labelling and shipping of surface-mount devices sensitive to the combined effect of moisture and soldering heat

Standardised methods for handling, packing, shipping, and use of moisture/reflow sensitive SMDs which have been classified to the levels defined in BS EN 60749-20 are provided. These methods aim to avoid damage from moisture absorption and exposure to solder reflow temperatures that can result in yield and reliability degradation. The standard applies to all non-hermetic SMD packages which are subjected to reflow solder processes and which are exposed to the ambient air.

Part 21: 2011 Solderability

A standard procedure for determining the solderability of device package terminations that are intended to be joined to another surface using tin-lead (SnPb) or lead-free (Pb-free) solder for the attachment is established.

Part 22: 2003 Bond strength

This specification applies to semiconductor devices (discrete devices and integrated circuits) and measures bond strength or determines compliance with specified bond strength requirements.

BS EN 61189
Test methods for electrical materials, interconnection structures and assemblies

Identical to IEC 61189

Part 1: 1997 (+ A1:1998; A2:2002) General test methods and methodology

A catalogue of test methods representing methodologies and procedures that can be applied to test materials used for manufacturing interconnection structures (printed boards) and assemblies is presented.

Part 2: 2006 Test methods for materials for interconnection structures

A catalogue of test methods representing methodologies and procedures that can be applied to test materials used for manufacturing interconnection structures (printed boards) and assemblies is presented.

Part 3: 2008 Test methods for interconnection structures (printed boards)

A catalogue of test methods representing methodologies and procedures that can be applied to test materials used for manufacturing interconnection structures (printed boards) and assemblies is presented.

Part 5: 2008 Test methods for printed board assemblies

Test methods for soldering fluxes, used in the manufacture of printed board assemblies, are specified.

Part 5-2: 2015 Test methods for printed board assemblies: Soldering flux

Test methods for materials and/or component robustness for printed board assemblies, irrespective of their method of manufacture, are specified.

Part 5-3: 2015 Test methods for printed board assemblies. Soldering paste

Test methods for soldering pastes, used in the manufacture of printed board assemblies, are specified.

Part 5-4: 2015 Test methods for printed board assemblies. Solder alloys and fluxed and non-fluxed solid wire

Test methods for solder alloys, fluxed and non-fluxed solid wire, as used in the manufacture of printed board assemblies, are specified.

Part 6: 2006 Test methods for materials used in manufacturing electronic assemblies

A catalogue of test methods representing methodologies and procedures that can be applied to materials used in manufacturing electronic assemblies is presented.

Part 11: 2013 Measurement of melting temperature or melting temperature ranges of solder alloys

The method for measuring the melting ranges of solder alloys that are mainly used for wiring of electrical equipment, communication equipment and other apparatus, as well as for connecting components, is described.

BS EN 61191
Printed board assemblies

Identical to IEC 61191-6

Part 6: 2010 Evaluation criteria for voids in soldered joints of BGA and LGA and measurement methods

The evaluation criteria for voids on the scale of the thermal cycle life, and the measurement method of voids using X-ray observation are specified. The standard is applicable to voids generated in the solder joints of BGA and LGA soldered on a board and not to the BGA package itself before it is assembled on a board. The standard covers joints made by melt and re-solidification, such as flip chip devices and multi-chip modules, in addition to BGA and LGA, but not to joints with under-fill between a device and a board, or to soldered joints within a device package. Macro voids from 10 to several hundred micrometres generated in a soldered joint, but not smaller voids (typically, planar micro voids) with a size of smaller than 10 micrometres in diameter are covered.

BS EN 62047
Semiconductor devices. Micro-electromechanical devices

Identical to IEC 62047

Part 9: 2011 Wafer to wafer bonding strength measurement for MEMS

A bonding strength measurement method of wafer to wafer bonding, type of bonding process such as silicon to silicon fusion bonding, silicon to glass anodic bonding, etc., and applicable structure size during MEMS processing/assembly are described. The applicable wafer thickness is in the range of 10 microns to several millimetres.

Part 13: 2012 Bend and shear type test methods of measuring adhesive strength for MEMS structures

The adhesive testing method between micro-sized elements and a substrate using the columnar shape of the specimens is specified. The standard can be applied to adhesive strength measurement of microstructures, prepared on a substrate, with width and thickness of 1 µm to 1 mm, respectively, and specifies the adhesive testing method for micro-sized-elements in order to optimally select materials and processing conditions for MEMS devices.

BS EN 62137: 2004
Environmental and endurance testing. Test methods for surface-mount boards of area array type packages FBGA, BGA, FLGA, LGA, SON and QFN
Superseded by BS EN 62137-4: 2014; Identical to IEC 62137: 2004

BS EN 62137
Surface mounting technology. Environmental and endurance test methods for surface mount solder joint

Identical to IEC 62137

Part 1-1: 2007 Pull strength test

A test method applicable to gull-wing lead surface mounting components is described. The method is designed to test and evaluate the endurance of the solder joint between component leads and lands on a substrate, by means of a pull type mechanical stress. The test is suitable for evaluating the effects of repeated temperature change on the strength of the solder joint between component terminals and lands on a substrate.

Part 1-2: 2007 Shear strength test

A test method for leadless surface mounting components and surface mounting connectors to which the pull test is not applicable is described (multi-lead components and gull-wing leads are not included). The method is designed to test and evaluate the endurance of the solder joint between component terminals and lands on a substrate, by means of a shear type mechanical stress, and is used to evaluate the effects of repeated temperature change on the strength of the soldered joints between terminals and lands on a substrate.

Part 1-3: 2009 Cyclic drop test

A test method for soldered joints between terminals of surface mounting devices (SMDs) and land patterns on printed wiring boards (PWBs) is described. The test evaluates the strength of the soldered joints of larger sized multi-terminal components and other components in devices (e.g. handheld mobile devices) in the event that the device is dropped. The properties of the solder joints (e.g. solder alloy, substrate, mounted device or design, etc.) are evaluated to assist in improving the strength of the soldered joints.

Part 1-4: 2009 Cyclic bending test

The test method described applies to surface mount components with a thin and wide basal plane, such as QFP and BGA. It evaluates the endurance of the soldered joints between component leads and lands on a substrate by cyclic bending of substrate and also the effects of repeated mechanical stress, such as key pushing in cell phones, the strength of the soldered joint between component terminals and lands on a substrate. Evaluation requires the surface mount component to be mounted on the substrate by reflow soldering, then the substrate is cyclically bent to a certain degree of depth until fracture of the soldered joints occurs. The properties of the soldered joints (e.g., solder alloy, substrate, mounted device or design, etc.) are evaluated to assist in improving joint strength.

Part 1-5: 2009 Mechanical shear fatigue test

A method, applying to area array packages such as BGA, is described to test and evaluate the fatigue life of the soldered joint between component leads and lands on the substrate of surface mounting connectors. The surface mount component is mounted on the substrate by reflow soldering and cyclic mechanical shear deformation is applied to the soldered joints until fracture occurs. After a general introduction, detail is given of test equipment and materials utilising the reflow soldering process and solder composition in the range Sn, 3-4%Ag, 0.5-1%Cu. Test piece assembly is defined. Shear test conditions and procedures are set out. Data to be included in test reports and product specifications are listed.

Part 3: 2012 Electronics Assembly technology. Selection guidance of environmental and endurance test methods for solder joints

The selection methodology of an appropriate test method for a reliability test for soldered joints of various shapes and types of surface mount devices (SMD), array type devices and leaded devices, and lead insertion type devices using various types of solder material alloys is described.

Part 4: 2014 Endurance test methods for solder joint of area array type package surface mount devices

The test method for evaluating the durability against thermo-mechanical stress of solder joints in area array type packages mounted on printed wiring boards is specified. The standard applies to surface mounting semiconductor devices with area array type packages (FBGA, BGA, FLGA and LGA), including peripheral termination type packages (SON and QFN), which are intended for use in industrial and consumer electrical or electronic equipment.

BS EN 62739
Test method for erosion of wave soldering equipment using molten lead-free solder alloy

Identical to IEC 62739

Part 1: 2013 Erosion test method for metal materials without surface processing

A test method for evaluating the erosion of metallic materials without surface processing, intended to be used for lead-free wave soldering equipment such as solder baths and other components which are in contact with the molten solder, is specified.

Part 2: 2016 Erosion test method for metal materials without surface processing

A test method to evaluate erosion by molten solder of metallic materials with surface processing, intended for the manufacture of solder baths and other lead-free wave soldering equipment in lead-free soldering, is detailed. The standard aims to prevent accidents or fires by predicting a setup and life of a suitable maintenance cycle.

BS ISO 16525
Adhesives. Test methods for isotropic electrically conductive adhesives

Part 1: 2014 General test methods

General test methods for isotropic electrically conductive adhesives used in wiring, die attach of semiconductors, and surface assembly of printed circuit boards are specified.

Part 2: 2014 Determination of electrical characteristics for use in electronic assemblies

Test methods for isotropic electrically conductive adhesives used in wiring, die attach, and surface assembly of printed circuit boards of electronic devices are specified. Test methods focus on volume and interfacial contact resistivity.

Part 3: 2014 Determination of heat-transfer properties

Test methods for heat-transfer properties such as effective thermal conductivity and thermal resistance by a steady-state comparative longitudinal heat-flow method (SCHF method) using cartridge-type specimen for isotropic electrically conductive adhesives used in wiring, die attach, and surface assembly are specified.

Part 4: 2014 Determination of shear strength and electrical resistance using rigid-to-rigid bonded assemblies

Test methods using miniature specimens to determine shear strength and electrical resistance of a bonded joint that consists of isotropic electrically conductive adhesives and rigid adherends in specified conditions are described.

Part 5: 2014 Determination of shear fatigue

Test methods using miniature specimens to measure shear fatigue of a glued joint that consists of isotropic electrically conductive adhesives and rigid adherends in specified conditions are described.

Part 6: 2014 Determination of pendulum-type shear impact

Pendulum-type test methods for impact strength of isotropic electrically conductive adhesives used in mounting components products on substrates are specified.

Part 7: 2014 Environmental test methods

Environmental test methods (cold, dry heat, damp heat and change of temperature) for isotropic electrically conductive adhesives used in the surface assembly of printed circuit boards of electronic devices are specified.

Part 8: 2012 Electrochemical-migration test methods

Test methods for confirming the occurrence of electrochemical migration in electrically isotropic conductive adhesives at high-temperature and humidity are specified. Electrical resistance is also determined.

Part 9: 2014 Determination of high-speed signal-transmission characteristics

Test methods to investigate the high-speed signal-transmission characteristics in the bonded portions of an isotropic electrically conductive adhesive, which joins the terminals of a surface mounted device (SMD) and the land grid patterns of a printed circuit board are specified. Also the characteristics of wiring with an isotropic electrically conductive adhesive, which can be applied on the printed circuit board, is investigated.

BS PD IEC/TS 62647
Process management for avionics. Aerospace and defence electronic systems containing lead free solder

Identical to IEC/PAS 62647

Part 3: 2014 Performance testing for systems containing lead-free solder and finishes

Failure mechanisms, through performance testing, in electronic products containing lead-free (Pb-free) solder, are evaluated. The PAS is applicable to products in all stages of the transition to Lead-free (Pb-free) solder, including products designed and qualified with traditional tin-lead electronic components, materials, and assembly processes, and are being re-qualified with use of lead-free (Pb-free) components; products with tin-lead designs transitioning to lead-free (Pb-free) solder; and products newly-designed with lead-free (Pb-free) solder.

IEC 62047
Semiconductor devices. Micro-electromechanical devices

Part 25: 2016 Silicon based MEMS fabrication technology. Measurement method of pull-press and shearing strength of micro bonding area

 

The in-situ testing method for measuring the bonding strength of the micro bonding area, which is fabricated by micromachining technologies used in silicon-based micro-electromechanical system (MEMS), is specified.

 

IPC-SM-785: 1992
Guidelines for accelerated reliability testing of surface mount solder attachments

Guidelines for accelerated reliability testing of surface mount solder attachments and for evaluating and extrapolating the results of these accelerated reliability tests towards actual use environments of electronic assemblies are provided. Background and design information for an understanding of accelerated test issues is given.

IPC/JEDEC J-STD-002D: 2013
Solderability tests for component leads, terminations, lugs, terminals and wires

Test methods, defect definitions, acceptance criteria, and illustrations for assessing the solderability of electronic component leads, terminations, solid wires, stranded wires, lugs, and tabs are prescribed. The standard also includes a test method for the resistance to dissolution / dewetting of metallisation.

IPC J-STD-003C: 2013 (+ A1: 2014)
Solderability test for printed boards

Test methods, defect definitions and illustrations for assessing the solderability of printed board surface conductors, attachment lands, and plated-through holes are prescribed.

JEDEC JESD22-B102E: 2007
Solderability

JEDEC - Solid State Technology Association

A test method is described providing optional conditions for preconditioning and soldering for the purpose of assessing the solderability of device package terminations. It provides procedures for dip and look solderability testing of through hole, axial and surface mount devices and a surface mount process simulation test for surface mount packages. The aim of the test is to provide a means of determining the solderability of device package terminations that are intended to be joined to another surface using lead (Pb) containing or Pb-free solder for the attachment.

JEDEC JESD22-B106D: 2008
Resistance to solder shock for through-hole mounted devices

JEDEC - Solid State Technology Association

A standard procedure for determining whether through-hole solid state devices can withstand the effects of the temperature to which they will be subject during soldering of their leads is defined.

JEDEC JESD22-B108B: 2010
Coplanarity test for surface mount semiconductor devices

JEDEC - Solid State Technology Association

The test measures the deviation of the terminals (leads or solder balls) from coplanarity at room temperature for surface mount semiconductor devices. The method is applicable for inspection and device characterisation.

JEDEC JESD22-B112A: 2009
Package warpage measurement of surface mount integrated circuits at elevated temperatures

JEDEC - Solid State Technology Association

The purpose of this test method is to measure the deviation from uniform flatness of an integrated circuit package body for the range of environmental conditions experienced during the surface-mount soldering operation.

MIL-STD-883K Change 1: 2016
Test method standard: microcircuits

Uniform methods, controls, and procedures for testing microelectronic devices suitable for use within military and aerospace electronic systems, including basic environmental tests to determine resistance to deleterious effects of natural elements and conditions surrounding military and space operations; mechanical and electrical tests; workmanship and training procedures; and such other controls and constraints as have been deemed necessary to ensure a uniform level of quality and reliability suitable to the intended applications of those devices are established.

SAE J1211: 2012
Handbook for robustness validation of automotive electrical/electronic modules

The robustness of electrical/electronic modules for use in automotive applications is addressed. Where practical, methods of extrinsic reliability detection and prevention are also covered. The document primarily deals with electrical/electronic modules (EEMs), but can easily be adapted for use on mechatronics, sensors, actuators and switches. The emphasis of the document is on hardware and manufacturing failure mechanisms.

SAE J1879: 2014
Handbook for robustness validation of semiconductor devices in automotive applications

The intrinsic reliability of electronic components for use in automotive electronics is addressed. Where practical, methods of extrinsic reliability detection and prevention are also covered. The document primarily deals with integrated circuit issues, but can easily be adapted for use in discrete or passive component qualification with the generation of a list of failure mechanisms relevant to those devices. Component qualification is the main scope of this document.

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